2009.02.09
1 extend the pretest time out to 60 mins.
2009.02.08
1Modify level90 run 2plane just mark the orginal bad block;
2Modify level100 run single plane just mark the orginal bad block;
2009.01.16
1Modify level02&level03 ,all the program action is running two plane mode to improve the speed;
2Modify level09 for Toshiba 43nm ,the reserve block change to 10;
2009.01.14
1level02 is from level01 for Mrcion;
2level03 is from level01 for Intel;
2009.01.07
1fix a bug of pretest code;
2008.12.31
1add Mrion 34nm
2008.12.25
1Toshiba 43nm:open ignore erase&program and change pattern;
2update Toshiba 43nm isp code;
 ps:
   level04: for G-Tek DG Flash will be better(is level12 change pattern);
   level09: is just for Toshiba 43nm.
2008.12.16
1. support toshiba 43nm DG flash in Level 9;
2. add  level 01 for more stick test pattern for Hopestar.

Ps: Level 10:  Write 2plane; read 1plane
    Llevel 11:  write/read 1plane
    Level 12:  page compare + block compare.
    Level 100: refer the original bad, 1 plane
    Level 90: refer the original bad , 2plane


2008.06.25
  1.Modify Clock Setting in DBF file
    *divide 0x180 bit5 write clock by 2
    *divide 0x181 bit6 read clock by 2
    *divide 0x180 bit6 read clock by 2
2.Modify Pattern Level 7, which is faster flash initialization than Level 11


2008.06.10
  1. Improve scan performance
  2. Improve yield rate
  3. Update flash test pattern LV8, LV9, and LV10
  4. Default set to LV10

2008.05.15
  1. Add Level 100

2009.05.09

  1. Improve Stability
  2. Update DBF table

2008.02.27
  Here are the update and release note:
  1. Update ISP to align with latest ISP(G1228)
  2. Improve Fast Flash Initialization
  3. Modify LED display 
  4. Update Flash test pattern Level 11, 12, 13

